A digital inverter (also referred to as a “NOT” gate) is considered to be a basic building block for all digital electronics. For example, memory (1 bit register) may be built as a latch by feeding the output of two serial inverters together. Multiplexers, decoders, state machines, and other sophisticated digital devices all rely on the basic inverter.
In digital logic, an inverter is a logic gate which inverts the digital signal driven on its input. It is also called NOT gate. The truth table of the gate is as follows:
InputOutput0110
This represents perfect switching behavior, which is the defining assumption in digital electronics. In practice, actual devices have electrical characteristics that must be carefully considered when designing inverters.
A digital inverter circuit outputs a voltage representing the opposite logic-level as its input. Digital electronics are circuits that operate at fixed voltage levels corresponding to a logical 0 or 1. An inverter circuit serves as the basic logic gate to swap between those two voltage levels. Implementation determines the actual voltage, but common levels include (0, +5V) for TTL (transistor-transistor logic) circuits.
A CMOS Inverter
FIG. 1 shows a simple CMOS digital inverter comprising a P-type transistor Q1 and an N-type transistor Q2. The gates of the two transistors are connected together. The source (S1) of transistor Q1 is connected to supply voltage VCC, the source (S2) of transistor Q2 is connected to ground GND. The drains (D1, D2) of the two transistors Q1 and Q2 are connected together.
An input node is connected to the gates (G1, G2) of the two transistors, and an output node is connected to the drains (D1, D2) of the two transistors Q1 and Q2. Since the two drains D1 and D2 are connected with one another, they may simply be referred to as the drain “D” of the inverter circuit. Similarly, since the two gates G1 and G2 are connected with one another, they may simply be referred to as the gate “G” of the inverter circuit. This results in the following terminology for an inverter circuit:                S1, which is a voltage (such as Vcc) representing one of the two binary logic levels        S2, which is a voltage (such as Gnd) representing the other of the binary logic levels        G, which is the input receiving a voltage to be inverted        D, which is the output providing the inverse of the input voltage        
If the input voltage (G) is ‘1’ (Vcc) the P-type transistor Q1 is non-conducting, but the N-type transistor Q2 is conducting and provides a path from GND to the output Y. The output level (D) therefore is ‘0’. On the other hand, if the input level (G) is ‘0’, the P-type transistor Q1 is conducting and provides a path from VCC to the output Y, so that the output level (D) is ‘1’, while the N-type transistor Q2 is blocked.
Nanotubes
Carbon nanotubes (CNTs) are allotropes of carbon. (An allotrope is one or more forms of an elementary substance, such as carbon. Diamond and graphite are perhaps the best known allotropes of carbon.)
A single-walled carbon nanotube (SWNT) is a one-atom thick sheet of graphite (called graphene) rolled up into a seamless cylinder with diameter on the order of a nanometer. This results in a nanostructure where the length-to-diameter ratio exceeds 1,000,000. Such cylindrical carbon molecules have novel properties that make them potentially useful in many applications in nanotechnology, electronics, optics and other fields of materials science. They exhibit extraordinary strength and unique electrical properties, and are efficient conductors of heat. Inorganic nanotubes have also been synthesized.
Nanotubes are members of the fullerene structural family, which also includes buckyballs. Whereas buckyballs are spherical in shape, a nanotube is cylindrical, with at least one end typically capped with a hemisphere of the buckyball structure. Their name is derived from their size, since the diameter of a nanotube is in the order of a few nanometers (approximately 1/50,000th of the width of a human hair), while they can be up to several millimeters in length. Nanotubes are categorized as single-walled nanotubes (SWNTs) and multi-walled nanotubes (MWNTs).
The nature of the bonding of a nanotube is described by applied quantum chemistry, specifically, orbital hybridization. The chemical bonding of nanotubes are composed entirely of sp2 bonds, similar to those of graphite. This bonding structure, which is stronger than the sp3 bonds found in diamond, provides the molecules with their unique strength. Nanotubes naturally align themselves into “ropes” held together by Van der Waals forces. Under high pressure, nanotubes can merge together, trading some sp2 bonds for sp3 bonds, giving great possibility for producing strong, unlimited-length wires through high-pressure nanotube linking.
The article entitled “A Non-volatile Nanoelectromechanical Memory element Utilizing a Fabric of Carbon Nanotubes, by Ward et al.”, incorporated by reference herein, discloses manufacturability of electronic devices based on carbon nanotubes (CNT) generally depends on the ability to manipulate and control individual structures at the molecular level. A technique has been developed to overcome this hurdle, allowing CNT-based nano-electro-mechanical devices to be fabricated directly on existing production CMOS fabrication lines. A CMOS-compatible fabrication process for these devices has been developed and demonstrated which is free from metallic or material contaminants and particulates. Because these nonvolatile memory elements are created in an all thin-film process, they can be monolithically integrated directly within existing CMOS circuitry to facilitate addressing and readout. Design considerations and preliminary device switching characteristics are presented.
The article entitled “Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing, Rueckes et al., Science, 7 Jul. 2000, vol 289, pages 94-97, incorporated by reference herein, discloses a concept for molecular electronics exploiting carbon nanotubes as both molecular device elements and molecular wires for reading and writing information.
Electrostatic Attraction
Electrostatics is the branch of science that deals with the phenomena arising from what seem to be stationary electric charges. This includes phenomena as simple as the attraction of plastic wrap to your hand after you remove it from a package to apparently spontaneous explosion of grain silos, to damage of electronic components during manufacturing, to the operation of photocopiers. Electrostatics typically involves the buildup of charge on the surface of objects due to contact with other surfaces. Although charge exchange happens whenever any two surfaces contact and separate, the effects of charge exchange are usually only noticed when at least one of the surfaces has a high resistance to electrical flow. This is because the charges that transfer to or from the highly resistive surface are more or less trapped there for a long enough time for their effects to be observed. These charges then remain on the object until they either bleed off to ground or are quickly neutralized by a discharge: e.g., the familiar phenomenon of a static ‘shock’ is caused by the neutralization of charge built up in the body from contact with nonconductive surfaces. Generally, objects in close proximity with one another and having opposite charges on them will attract each other.
The article entitled “Nanoelectromechanical DRAM for ultra-large-scale integration (ULSI)”, Jang et al., 0-7803-9269-8/05, copr. 2005, IEEE, incorporated by reference herein, describes a Nanoelectromechanical (NEM) device for dynamic random access memory (DRAM). A vertical nanotube structure is employed to form the electromechanical switch and capacitor structure. The mechanical movement of the nanotube defines ‘On’ and ‘OFF’ states and the electrical signals which result lead to charge storage in a vertical capacitor structure as in a traditional DRAM. The vertical structure contributes greatly to a decrease in cell dimension. The main concept of the NEM switch and capacitor can be applied to other memory devices as well. As disclosed therein:                MWCNTs were vertically grown on three Nb metal electrodes using a C2H2 and NH3 gas mixture, using direct current plasma enhanced chemical vapor deposition (DC-PECVD). A “source” MWCNT is electrically connected to ground, acting as a negative electrode. Positive electrostatic charge builds up n the “drain” MWCNT and the gate electrodes when connected to positive voltage supplies. The gate pushes the drain MWCNT towards the source MWCNT due to electrostatic forces, and the drain MWCNT makes contact to the source MWCNT.        